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  ? semiconductor components industries, llc, 2002 april, 2002 rev. 7 1 publication order number: mc78lc00/d mc78lc00 series micropower voltage regulator the mc78lc00 series of fixed output low dropout linear regulators are designed for handheld communication equipment and portable battery powered applications which require low quiescent current. the mc78lc00 series features an ultralow quiescent current of 1.1 m a. each device contains a voltage reference unit, an error amplifier, a pmos power transistor, and resistors for setting output voltage. the mc78lc00 has been designed to be used with low cost ceramic capacitors and requires a minimum output capacitor of 0.1 m f. the device is housed in the microminiature thin sot235 surface mount package and sot89, 3 pin. standard voltage versions are 1.5, 1.8, 2.5, 2.7, 2.8, 3.0, 3.3, 4.0, and 5.0 v. other voltages are available in 100 mv steps. features ? low quiescent current of 1.1 m a typical ? excellent line and load regulation ? maximum operating voltage of 12 v ? low output voltage option ? high accuracy output voltage of 2.5% ? industrial temperature range of 40 c to 85 c ? two surface mount packages (sot89, 3 pin, or sot23, 5 pin) typical applications ? battery powered instruments ? handheld instruments ? camcorders and cameras fi g ure 1. representative block dia g ram 23 1 this device contains 8 active transistors. v in gnd v o v ref sot89 h suffix case 1213 1 tab (tab is connected to pin 2) 1 2 3 gnd v in v out ta b (top view) xxyy see detailed ordering and shipping information in the package dimensions section on page 12 of this data sheet. ordering information thin sot235 ntr suffix case 483 1 5 marking diagrams and pin connections 1 3 n/c gnd 2 v in v out 4 n/c 5 xxxyw xxx = version y = year w = work week (top view) http://onsemi.com
mc78lc00 series http://onsemi.com 2 pin function description pin no. pin name description 1 gnd power supply ground 2 v in positive power supply input voltage 3 v out regulated output 4 n/c no internal connection 5 n/c no internal connection maximum ratings rating symbol value unit input voltage v in 12 v output voltage v out 0.3 to v in +0.3 v power dissipation and thermal characteristics case 48301 (thin sot235) ntr suffix power dissipation @ t a = 85 c thermal resistance, junctiontoambient case 1213 (sot89) h suffix power dissipation @ t a = 25 c thermal resistance, junctiontoambient p d r q ja p d r q ja 140 280 300 333 mw c/w mw c/w operating junction temperature t j +125 c operating ambient temperature t a 40 to +85 c storage temperature t stg 55 to +150 c lead soldering temperature @ 260 c t solder 10 sec
mc78lc00 series http://onsemi.com 3 electrical characteristics (v in = v out(nom.) + 1.0 v, c in = 1.0 m f, c out = 1.0 m f, t j = 25 c, unless otherwise noted.) (note 5) ntr suffix characteristic symbol min typ max unit output voltage (t a = 25 c, i out = 1.0 ma) 1.5 v 1.8 v 2.5 v 2.7 v 2.8 v 3.0 v 3.3 v 4.0 v 5.0 v v out 1.455 1.746 2.425 2.646 2.744 2.94 3.234 3.9 4.90 1.5 1.8 2.5 2.7 2.8 3.0 3.3 4.0 5.0 1.545 1.854 2.575 2.754 2.856 3.06 3.366 4.1 5.10 v output voltage (t a = 40 c to 85 c) 1.5 v 1.8 v 2.5 v 2.7 v 2.8 v 3.0 v 3.3 v 4.0 v 5.0 v v out 1.455 1.746 2.425 2.619 2.716 2.910 3.201 3.9 4.90 1.5 1.8 2.5 2.7 2.8 3.0 3.3 4.0 5.0 1.545 1.854 2.575 2.781 2.884 3.09 3.399 4.1 5.10 v line regulation (v in = v o(nom.) + 1.0 v to 12 v, i out = 1.0 ma) reg line 0.05 0.2 %/v load regulation (i out = 1.0 ma to 10 ma) reg load 40 60 mv output current (note 6) 1.5 v, 1.8 v (v in = 4.0 v) 2.5 v, 2.7 v, 2.8 v, 3.0 v (v in = 5.0 v) 3.3 v (v in = 6.0 v) 4.0 v (v in = 7.0 v) 5.0 v (v in = 8.0 v) i out 35 50 50 80 80 50 80 80 80 100 ma dropout voltage (i out = 1.0 ma, measured at v out 3.0%) 1.5 v 1.6 v3.2 v 3.3 v3.9 v 4.0 v5.0 v v in v out 35 30 30 30 70 60 53 38 mv quiescent current (i out = 1.0 ma to i o(nom.) ) i q 1.1 3.6 m a output voltage temperature coefficient t c  100 ppm/ c output noise voltage (f = 1.0 khz to 100 khz) v n 89 m vrms 1. this device series contains esd protection and exceeds the following tests: human body model 2000 v per milstd883, method 3015 machine model method 200 v 2. latch up capability (85 c)  100 ma 3. maximum package power dissipation limits must be observed. pd  t j(max)  t a r  ja 4. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 5. low duty pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 6. output current is measured when v out = v o1 3% where v o1 = v out at i out = 0 ma.
mc78lc00 series http://onsemi.com 4 electrical characteristics (v in = v out(nom.) + 1.0 v, c in = 1.0 m f, c out = 1.0 m f, t j = 25 c, unless otherwise noted.) (note 11) ht suffix characteristic symbol min typ max unit output voltage 30ht1 suffix (v in = 5.0 v) 33ht1 suffix (v in = 5.0 v) 40ht1 suffix (v in = 6.0 v) 50ht1 suffix (v in = 7.0 v) 2.950 3.218 3.900 4.875 3.0 3.3 4.0 5.0 3.075 3.382 4.100 5.125 v line regulation v in = [v o + 1.0] v to 10 v, i o = 1.0 ma reg line 0.05 0.2 %/v load regulation (i o = 1.0 to 10 ma) 30ht1 suffix (v in = 5.0 v) 33ht1 suffix (v in = 6.0 v) 40ht1 suffix (v in = 7.0 v) 50ht1 suffix (v in = 8.0 v) reg load 40 40 50 60 60 60 70 90 mv output current (note 12) 30ht1 suffix (v in = 5.0 v) 33ht1 suffix (v in = 6.0 v) 40ht1 suffix (v in = 7.0 v) 50ht1 suffix (v in = 8.0 v) i o 35 35 45 55 50 50 65 80 ma dropout voltage 30ht1 suffix (i o = 1.0 ma) 33ht1 suffix (i o = 1.0 ma) 40ht1 suffix (i o = 1.0 ma) 50ht1 suffix (i o = 1.0 ma) v in v o 40 35 25 25 60 53 38 38 mv quiescent current 30ht1 suffix (v in = 5.0 v) 33ht1 suffix (v in = 5.0 v) 40ht1 suffix (v in = 6.0 v) 50ht1 suffix (v in = 7.0 v) i cc 1.1 1.1 1.2 1.3 3.3 3.3 3.6 3.9 m a output voltage temperature coefficient t c 100 ppm/ c 7. this device series contains esd protection and exceeds the following tests: human body model 2000 v per milstd883, method 3015 machine model method 200 v 8. latch up capability (85 c)  100 ma 9. maximum package power dissipation limits must be observed. pd  t j(max)  t a r  ja 10. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible . 11. low duty pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 12. output current is measured when v out = v o1 3% where v o1 = v out at i out = 0 ma.
mc78lc00 series http://onsemi.com 5 definitions load regulation the change in output voltage for a change in output current at a constant temperature. dropout voltage the input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. measured when the output drops 3% below its nominal. the junction temperature, load current, and minimum input supply requirements affect the dropout level. maximum power dissipation the maximum total dissipation for which the regulator will operate within its specifications. quiescent current the quiescent current is the current which flows through the ground when the ldo operates without a load on its output: internal ic operation, bias, etc. when the ldo becomes loaded, this term is called the ground current. it is actually the difference between the input current (measured through the ldo input pin) and the output current. line regulation the change in output voltage for a change in input voltage. the measurement is made under conditions of low dissipation or by using pulse technique such that the average chip temperature is not significantly affected. line transient response typical over and undershoot response when input voltage is excited with a given slope. maximum package power dissipation the maximum power package dissipation is the power dissipation level at which the junction temperature reaches its maximum operating value, i.e. 125 c. depending on the ambient power dissipation and thus the maximum available output current.
mc78lc00 series http://onsemi.com 6 v in , input voltage (v) 2.5 3.2 t a = 25 c i o = 10 ma 3 2.8 2.6 2.4 2.2 2.7 3.5 2.9 3.1 3.3 v o , output voltage (v) figure 2. output voltage versus input voltage i o = 5 ma 2.3 2.5 2.7 2.9 3.1 i o = 1 ma ntr series 2.5 3.2 figure 3. output voltage versus input voltage t a = 25 c i o = 1.0 ma i o = 5.0 ma i o = 10 ma 3.0 2.8 2.6 2.4 2.2 2.7 3.5 2.9 3.1 3.3 mc78lc30ht1 2.95 2.85 3 2.8 2.9 2.6 3.05 i o , output current (ma) v o , output voltage (v) figure 4. output voltage versus output current 080 60 40 100 20 120 25 c 80 c 40 c 2.75 2.7 2.65 ntr series 0 3.2 i o , output current (ma) figure 5. output voltage versus output current t a = 80 c t a = 30 c t a = 25 c 3.1 3.0 2.9 2.8 2.7 0 20 40 60 80 100 120 mc78lc30ht1 0 2 1.8 1.6 1.4 40 30 20 1.2 1 0.8 0.2 0 10 50 i o , output current (ma) figure 6. dropout voltage versus output current v in v o , dropout voltage (v) mc78lc30ntr t a = 25 c 0.6 0.4 0 2.0 figure 7. dropout voltage versus output current 1.6 1.2 0.8 0.4 0 10 20 30 40 50 mc78lc30ht1 t a = 25 c v o , output voltage (v) v o , output voltage (v) v in , input voltage (v) v in v o , dropout voltage (v) i o , output current (ma)
mc78lc00 series http://onsemi.com 7 2.98 t a , ambient temperature ( c) v o , output voltage (v) figure 8. output voltage versus temperature 40 40 60 20 0 20 80 2.9 3.02 2.94 3.06 3.1 mc78lc30ntr v in = 4.0 v i o = 10 ma 40 3.10 figure 9. output voltage versus temperature v in = 5.0 v i o = 10 ma 3.06 3.02 2.98 2.94 2.90 200 20406080 mc78lc30ht1 1.4 1.3 1.1 1.2 1 0.9 0.8 v in , input voltage (v) figure 10. quiescent current versus input voltage i q , quiescent current ( m a) 37 6 5 48912 mc78lc30ntr t a = 25 c i o = 0 ma 10 11 3.0 figure 11. quiescent current versus input voltage t a = 25 c 1.4 1.3 1.2 1.1 1.0 0.9 0.8 4.0 5.0 6.0 7.0 8.0 9.0 10 mc78lc30ht1 0.75 0.5 1 1.25 1.5 1.75 t a , ambient temperature ( c) i q , quiescent current ( m a) 20 60 40 20 080 figure 12. quiescent current versus temperature mc78lc30ntr v in = 4.0 v i o = 0 ma 40 figure 13. quiescent current versus temperature v in = 5.0 v 1.2 1.1 1.0 0.9 0.8 0.7 0.6 20 0 20 40 60 80 mc78lc30ht1 t a , ambient temperature ( c) v o , output voltage (v) v in , input voltage (v) i q , quiescent current ( m a) t a , ambient temperature ( c) i q , quiescent current ( m a)
mc78lc00 series http://onsemi.com 8 0.0 0.7 5.0 0.6 4.0 1.0 v in v out, dropout voltage (v) 0.5 figure 14. dropout voltage versus set output voltage 0.8 v o , set output voltage (v) 2.0 3.0 6.0 0 0.4 0.3 0.2 0.1 ntr series 0 0.8 figure 15. dropout voltage versus set output voltage i o = 10 ma i o = 1.0 ma 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 1.0 2.0 3.0 4.0 5.0 6.0 ht1 series 4.0 200 5.0 100 300 300 6.0 time (ms) figure 16. line transient input voltage (v) 0 2.0 2.5 1.5 1.0 0.5 v in = 4.5 v to 5.5 v v out = 3.0 v 100 200 0 output voltage deviation (mv) r l = 3 k c out = 0.1 m f ntr series input voltage/output voltage (v) 0 8.0 t, time (ms) c o = 0.1 m f i o = 1.0 ma figure 17. line transient response input voltage output voltage 7.5 7.0 6.5 6.0 5.5 5.0 4.5 4.0 2.0 4.0 6.0 ht1 series 0 2.0 1.5 1.0 0.5 2.5 v in , input voltage (v) figure 18. output voltage versus input voltage figure 19. ground current versus input voltage v out , output voltage (v) 3.5 3.0 2.5 2.0 0.5 0 1.5 1.0 t a = 25 c i o = 50  a 100  a 200  a 0 2.0 1.5 1.0 0.5 2.5 v in , input voltage (v) i g ground current (  a) t a = 25 c i o = 0 ma 50  a 100  a 200  a 1.5 1.0 0.8 0.2 0 0.6 0.4 50  a 200  a ntr series ntr series v in v out, dropout voltage (v) v o , set output voltage (v)
mc78lc00 series http://onsemi.com 9 applications information a typical application circuit for the mc78lc00 series is shown in figure 20. input decoupling (c1) a 0.1 m f capacitor either ceramic or tantalum is recommended and should be connected close to the mc78lc00 package. higher values and lower esr will improve the overall line transient response. output decoupling (c2) the mc78lc00 is a stable component and does not require any specific equivalent series resistance (esr) or a minimum output current. capacitors exhibiting esrs ranging from a few m w up to 3.0 w can thus safely be used. the minimum decoupling value is 0.1 m f and can be augmented to fulfill stringent load transient requirements. the regulator accepts ceramic chip capacitors as well as tantalum devices. larger values improve noise rejection and load regulation transient response. hints please be sure the vin and gnd lines are suf ficiently wide. when the impedance of these lines is high, there is a chance to pick up noise or cause the regulator to malfunction. set external components, especially the output capacitor, as close as possible to the circuit, and make leads as short as possible. thermal as power across the mc78lc00 increases, it might become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material, and also the ambient temperature effect the rate of temperature rise for the part. this is stating that when the mc78lc00 has good thermal conductivity through the pcb, the junction temperature will be relatively low with high power dissipation applications. the maximum dissipation the package can handle is given by: pd  t j(max)  t a r  ja if junction temperature is not allowed above the maximum 125 c, then the mc78lc00ntr can dissipate up to 357 mw @ 25 c. the power dissipated by the mc78lc00ntr can be calculated from the following equation: p tot  [ v in *i gnd (i out ) ]  [ v in  v out ] *i out or v inmax  p tot  v out * i out i gnd  i out if an 80 ma output current is needed then the ground current from the data sheet is 1.1 m a. for an mc78lc30ntr (3.0 v), the maximum input voltage will then be 7.4 v. v out c2 + c1 + battery or unregulated voltage figure 20. basic application circuit for ntr suffixes
mc78lc00 series http://onsemi.com 10 figure 21. current boost circuit 23 v o gnd v in gnd 1 0.1 m f 0.1 m f mc78lc00 mjd32c 100 0.033 m f figure 22. adjustable v o v o v in i cc c2 c1 mc78lc00 r1 gnd r2 23 1 figure 23. current boost circuit with overcurrent limit circuit v o gnd v in gnd 0.1 m f 0.1 m f mc78lc00 mjd32c q1 r1 r2 q2 mmbt2907 alt1 0.033 m f 23 1 i o(short circuit)  v be2 r2  v be1  v be2 r1 v o  v o(reg)  1  r2 r1   i cc r2
mc78lc00 series http://onsemi.com 11 minimum recommended footprint for surface mounted applications surface mount board layout is a critical portion of the total design. the footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. with the correct pad geometry, the packages will self align when subjected to a solder reflow process. inches mm 0.028 0.7 0.074 1.9 0.037 0.95 0.037 0.95 0.094 2.4 0.039 1.0 thin sot235
mc78lc00 series http://onsemi.com 12 ordering information device nominal output voltage marking package shipping mc78lc15ntr 1.5 lag mc78lc18ntr 1.8 lah mc78lc25ntr 2.5 lai mc78lc27ntr 2.7 laj mc78lc28ntr 2.8 lak thin sot235 3000 units/7 tape & reel mc78lc30ntr 3.0 lal thin sot23 5 3000 units/7 ta e & reel mc78lc33ntr 3.3 lam mc78lc40ntr 4.0 lec mc78lc50ntr 5.0 lan mc78lc30ht1 3.0 0c mc78lc33ht1 3.3 3c sot89 1000 units ta p e & reel mc78lc40ht1 4.0 0d sot 89 1000 u n i ts t ape & r ee l mc78lc50ht1 5.0 0e additional voltages in 100 mv steps are available upon request by contacting your on semiconductor representative.
mc78lc00 series http://onsemi.com 13 package dimensions thin sot235 ntr suffix plastic package case 48301 issue b notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. dim min max min max inches millimeters a 2.90 3.10 0.1142 0.1220 b 1.30 1.70 0.0512 0.0669 c 0.90 1.10 0.0354 0.0433 d 0.25 0.50 0.0098 0.0197 g 0.85 1.05 0.0335 0.0413 h 0.013 0.100 0.0005 0.0040 j 0.10 0.26 0.0040 0.0102 k 0.20 0.60 0.0079 0.0236 l 1.25 1.55 0.0493 0.0610 m 0 10 0 10 s 2.50 3.00 0.0985 0.1181 0.05 (0.002) 123 54 s a g l b d h c k m j   
mc78lc00 series http://onsemi.com 14 package dimensions k l g h m 0.10 t s b s a m 0.10 t s b s a d e 2 pl c j a b f t seating plane notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeters 3. 1213-01 obsolete, new standard 1213-02. dim a min max min max inches 4.40 4.60 0.173 0.181 millimeters b 2.40 2.60 0.094 0.102 c 1.40 1.60 0.055 0.063 d 0.37 0.57 0.015 0.022 e 0.32 0.52 0.013 0.020 f 1.50 1.83 0.059 0.072 g 1.50 bsc 0.059 bsc h 3.00 bsc 0.118 bsc j 0.30 0.50 0.012 0.020 k 0.80 --- 0.031 --- l --- 4.25 --- 0.167 sot89 h suffix plastic package case 121302 issue c
mc78lc00 series http://onsemi.com 15 notes
mc78lc00 series http://onsemi.com 16 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc78lc00/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada


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